A BGA (Ball Grid Array)-type package is generally used for a package of a semiconductor component, for example, a CPU (processor). As shown schematically in FIG. 12(b), this kind of BGA-type component (CPU) 1 has plural ball shaped solder bumps 2 arrayed in a grid on a mounting surface (lower surface) of a package 1a. As also shown in FIG. 12(a), FIGS. 13(a), (b) and FIGS. 14(a), (b), a multilayer substrate 4 having plural lands 3 corresponding to the solder bumps 2 at a front surface portion thereof is used for mounting the BGA-type component 1 thereon.
In general, a soldering step called reflow is known to be performed for mounting the semiconductor component on the substrate (for example, see patent literatures 1 and 2). As described in the patent literature 1, a portion of a front surface of the multilayer substrate 4 other than the lands 3 is covered with a resist film 5 (see FIG. 12(b)). In the reflow step, a soldering paste 6 is applied only to the lands 3 of the multilayer substrate 4. Then, the solder bumps 2 of the BGA-type component 1 are placed on the soldering paste 6 on the lands 3 and heated under temperature control. Thus, the multilayer substrate 4 and the BGA-type component 1 are connected.
Recently, because of a development of a semiconductor technology, a rapid improvement of an operating speed of a large-scale integration (LSI) and an acceleration of a transmission rate of handled data are attempted and an operating speed of a CPU is accelerated. Therefore, a high frequency signal in a gigahertz level is transmitted between the CPU and a memory or between the CPU and a device connected with the CPU. However, due to a nature of an electromagnetic wave, the high frequency signal in the gigahertz level causes a signal reflection at an end of a wiring and a leakage of the electromagnetic wave to an adjacent wiring. As a result, the operation of the CPU is unstable.
To solve such drawbacks, it is preferable to make the length of the signal lines between devices uniform or to separate the signal lines from the adjacent wirings completely. However, it is difficult to separate the wirings when an information processing device is miniaturized. In order to transmit the high frequency signal surely in the wiring connecting the CPU and an element, it is effective to form the signal line expanding three-dimensionally in a plate thickness direction of the multilayer substrate, and ideally, to dispose a conducting plane (shield) like a wall, or a ground wire surrounding the signal line. On a manufacturing process of the multilayer substrate, however, it is considered to be difficult to dispose the conductive plane and the ground wire surrounding the signal line.
As an alternative of the conducting portion (shield), as shown in FIG. 12(a) to FIG. 14(b), a conductive through hole 7 is formed in the multilayer substrate 4 between the lands 3 to which the CPU 1 is soldered to restrict a signal interference between the signal lines. The conductive through hole 7 is provided with circular through hole lands 7a at both an upper surface and a lower surface of the multilayer substrate 4 and a copper plating formed on an inner surface of a through hole connecting the through hole lands 7a on the upper and lower surfaces of the multilayer substrate 4. The conductive through hole 7 has, for example, a ground potential. Currently, as shown in FIG. 12(a), the multilayer substrate in which a distance a between centers of the lands 3 in vertical and horizontal directions is around 0.8 mm is generally used, and the inner diameter R of the thorough hole 7 is, for example, around 0.3 mm.